hv7022c doc.# dsfp-hv7022c b041111 features ? hvcmos ? technology ? symmetric row drive (reduces latent imaging in actfel displays) ? output voltage up to +230v ? low power level shifting ? source/sink current minimum 70ma ? shift register speed 4.0mhz ? pin-programmable shift direction functional block diagram 34-channel symmetric row driver general description the hv7022c is a low-voltage serial to high-voltage parallel converter with push-pull outputs. it is especially suited for use as a symmetric row driver in ac thin-flm electroluminescent (actfel) displays. the hv7022c offers 34 output lines, a direction (dir) pin to give cw or ccw shift register loading, output enable (oe), and polarity (pol) control. after data is entered (on the falling edge of clk), a logic high will cause the output to swing to vpp if pol is high, or to gnd if pol is low. hv out 1 oe pol data input data out gnd s/r clk vdd vpp dir hv out 2 hv out 34 level translator p n p n p n level translator level translator supertex inc. supertex inc. www .supertex.com
2 hv7022c doc.# dsfp-hv7022c b041111 ordering information device package options 44-lead quad cerpac chip carrier .650x.650in body .190in height (max) .050in pitch 44-lead plcc .653x.653in body .180in height (max) .050in pitch hv7022-c hv7022dj-c* HV7022PJ-C-G -g indicates package is rohs compliant (green) * hi-rel process fow available. absolute maximum ratings pin confguration 1 44 6 40 product marking yy = year sealed ww = week sealed l = lot number c = country of origin* a = assembler id* *may be part of top marking top marking bottom marking yyww hv7022dj-c llllllllll ccccccccccc aaa 44-lead quad cerpac chip carrier (dj) 44-lead quad cerpac chip carrier (dj) (top view) 1 44 6 40 44-lead plcc (pj) (top view) yy = year sealed ww = week sealed l = lot number a = assembler id c = country of origin* = ?green? packaging *may be part of top marking top marking bottom marking yyww aaa hv7022pj-c llllllllll ccccccccccc 44-lead plcc (pj) parameter value supply voltage, v dd -0.3v to +15v supply voltage, v pp -0.3v to +250v logic input levels -0.3v to v dd +0.3v ground current 1 1.5a continuous total power dissipation 2 plastic ceramic 1200mw 1500mw operating temperature range plastic ceramic -40 o c to +85 o c -55 o c to +125 o c storage temperature range -65 o c to +150 o c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. notes: 1. duty cycle is limited by the total power dissipated in the package. 2. for operation above 25c ambient derate linearly to maximum operating temperature at 25mw/c for plastic and at 15mw/c for ceramic. package may or may not include the following marks: si or package may or may not include the following marks: si or supertex inc. www .supertex.com
3 hv7022c doc.# dsfp-hv7022c b041111 sym parameter min max units conditions i dd v dd supply current - 10 ma f clk = 4.0mhz, v dd =13.2v i pp v pp supply current - 4.0 ma one output high 1 - 100 a all outputs low or high-z - 750 all outputs low or high-z (125 o c) i ddq quiescent v dd supply current - 100 a all v in = gnd or v dd v oh high-level output hv out 195 - v i o = -70ma data out 11 - v i o = -500a v ol low-level output hv out - 30 v i o = +70ma data out - 1.0 v i o = +500a i ih high-level logic input current - 1.0 a v ih = 12v i il low-level logic input current - -1.0 a v il = 0v note: 1. the total number of on outputs times the duty cycle must not exceed the allowable package power dissipation. dc electrical characteristics (over recommended operating conditions of v dd = 12v, v pp = 230v, and t a = 25c unless noted) power-up sequence should be the following: 1. connect ground. 2. apply v dd . 3. set all inputs (data, clk, enable, etc.) to a known state. 4. apply v pp . (the v pp should not drop below v dd or foat during operation.) power-down sequence should be the reverse of the above. recommended operating conditions sym parameter min max units v dd logic supply voltage 10.8 13.2 v v pp high voltage supply - 230 v v ih high-level input voltage v dd = 10.8 8.1 - v v dd = 13.2 9.9 - v il low-level input voltage v dd = 10.8 - 2.7 v v dd = 13.2 - 3.3 f clk clock frequency - 4.0 mhz t a operating free-air temperature plastic -40 +85 c ceramic -55 +125 i od allowable pulsed current through output diode - 300 ma supertex inc. www .supertex.com
4 hv7022c doc.# dsfp-hv7022c b041111 ac electrical characteristics (v dd = 12v and t a = 25c) sym parameter min max units conditions f clk clock frequency - 4.0 mhz --- t wh , t wl pulse duration clock width high or low 125 - ns --- t sud data set-up time before falling clock 100 - ns --- t hd data hold time after falling clock 100 - ns --- t suc setup time clock low before v pp or gnd 300 - ns --- t sue setup time enable high before v pp or gnd 300 - ns --- t sup setup time polarity high or low before v pp or gnd 300 - ns --- t hc hold time clock high after v pp or gnd 500 - ns --- t he hold time enable high after v pp or gnd 300 - ns --- t hp hold time polarity high or low after v pp or gnd 300 - ns --- t dhl delay time high to low-level output from clock - 150 ns c l = 10pf t dlh delay time low to high-level output from clock - 200 ns c l = 10pf t thl transition time high to low-level serial output - 200 ns c l = 15pf t tlh transition time low to high-level serial output - 100 ns c l = 15pf t onh high-level turn-on time hv out from enable - 500 ns v oh = 195v, r l = 2.0k? to 95v t onl low-level turn-on time hv out from enable - 500 ns v oh = 130v, r l = 2.0k? to 30v t offh high-level turn-off time hv out from enable - 1000 ns v oh = 195v, r l = 2.0k? to 95v t offl low-level turn-off time hv out from enable - 500 ns v oh = 130v, r l = 2.0k? to 30v sr slew rate, v pp or gnd - 45 v/s one active output driving 4.7nf load to v pp or gnd function table i/o relations inputs outputs clk dir data pol oe shift reg hv out data out o/p high x x h h h * h * o/p off x x l h h * high-z * o/p low x x h l h * l * o/p off x x l l h * high-z * o/p off x x x x l * all o/p high-z * load s/r, set dir l x x x q n q n+1 * q 34 h x x x q n q n-1 * q 1 no x x x x * no change no change notes: h = logic high level, l = logic low level, x = irrelevant, = high-to-low transition q1 = hv out 1, qn = hv out n, etc. * = dependent on previous state and whether an o/p or s/r command occurred. supertex inc. www .supertex.com
5 hv7022c doc.# dsfp-hv7022c b041111 hv out characteristics i (ma) i (ma) volts 02 04 06 08 0 180 140 100 60 20 01 00 20 40 60 80 v pp > 40v v dd = 12v & 14v 100 180 140 100 60 20 volts (v pp - hv out ) temp = 25 o c v dd = 12v output n-channel characteristics through fet output p-channel characteristics through fe t temp = 25 o c v dd = 14v v dd = 10v input and output equivalent circuits vdd data input gnd vpp gnd hv out logic inputs gnd data out logic data output high voltage outputs vdd supertex inc. www .supertex.com
6 hv7022c doc.# dsfp-hv7022c b041111 switching waveforms 50% 50% data out clk 50%5 0% 50% t sud t hd v ih t wl t wh 1/f clk t tlh 90% 10% t thl 90% 10% t dlh t dhl data input v ih v il v oh v ol t suc 10% 90% t hc 50 %5 0% v ih v il 90% pol 10% t sup sup t hp 50% 50% t sue t he 10% 90% 10% 90% t onl t onh t offl t offh v ih v il oe hv out hv out high impedence high impedenc e v il v oh v ol v oh v ol v oh v ol v oh v ol v oh v ol v oh v ol hv out p-ch hv out n-ch hv out p-ch hv out n-ch supertex inc. www .supertex.com
7 hv7022c doc.# dsfp-hv7022c b041111 pin descriptions pin # function 1 hv out 18/17 2 hv out 17/18 3 hv out 16/19 4 hv out 15/20 5 hv out 14/21 6 hv out 13/22 7 hv out 12/23 8 hv out 11/24 9 hv out 10/25 10 hv out 9/26 11 hv out 8/27 12 hv out 7/28 13 hv out 6/29 14 hv out 5/30 15 hv out 4/31 16 hv out 3/32 17 hv out 2/33 18 hv out 1/34 19 data out 20 oe 21 clk 22 gnd pin # function 23 dir 24 vdd 25 pol 26 data input 27 vpp 28 nc 29 hv out 34/1 30 hv out 33/2 31 hv out 32/3 32 hv out 31/4 33 hv out 30/5 34 hv out 29/6 35 hv out 28/7 36 hv out 27/8 37 hv out 26/9 38 hv out 25/10 39 hv out 24/11 40 hv out 23/12 41 hv out 22/13 42 hv out 21/14 43 hv out 20/15 44 hv out 19/16 note: pin designation for dir h/l example: for dir = h, pin 1 is hv out 18 for dir = l, pin 1 is hv out 17 supertex inc. www .supertex.com
8 hv7022c doc.# dsfp-hv7022c b041111 44-lead quad cerpac package outline (dj) .650x.650in body, .190in height (max), .050in pitch .150 max .040 x 45 o 1 .075 max 6 40 d d1 e1 e t op vi ew vi ew b a a2 a1 seating plane e b note 1 (index area) .035 x 45 o 0.25 max 3 places .025 min vi ew b 44 b1 horizontal side v iew v ertical side vi ew symbol a a1 a2 b b1 d d1 e e1 e dimension (inches) min .155 .090 .060 ref .017 .026 .685 .630 .685 .630 .050 bsc nom .172 .100 .019 .029 .690 .650 .690 .650 max .190 .120 .021 .032 .695 .665 .695 .665 jedec registration mo-087, variation ab, issue b, august, 1991. drawings not to scale . supertex doc. #: dspd-44cerpacdj, version d090808. note: 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. supertex inc. www .supertex.com
9 hv7022c (the package drawing(s) in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-hv7022c b041111 44-lead plcc package outline (pj) .653x.653in body, .180in height (max), .050in pitch symbol a a1 a2 b b1 d d1 e e1 e r dimension (inches) min .165 .090 .062 .013 .026 .685 .650 .685 .650 .050 bsc .025 nom .172 .105 - - - .690 .653 .690 .653 .035 max .180 .120 .083 .021 .036 ? .695 .656 .695 .656 .045 jedec registration ms-018, variation ac, issue a, june, 1993. ? this dimension differs from the jedec drawing. drawings not to scale. supertex doc. #: dspd-44plccpj, version f031111. 1 64 0 44 .150max .048/.042 x 45 o d d1 e1 e t op vi ew v iew b a a2 a1 seating plane .056/.042 x 45 o base plane .020min b vi ew b b1 horizontal side v iew v ertical side vi ew .020max (3 places) r e note 1 (index area) note 2 .075max notes: 1. a pin 1 identifer must be located in the index area indicated. the pin 1 identifer can be: a molded mark/identifer; an embedded metal marker; or a printed indicator. 2. actual shape of this feature may vary. supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?2013 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com
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